HIPEAC 2016 Tutorial Training Material

CONTREX: Virtual Integration Testing for Mixed-Criticality Systems under Consideration of Power and Temperature Constraints


Room: Stella @ Clarion Congress Hotel Prague

Jan. 19, 2016 10:00 - 13:00


HIPEAC 2016 Tutorial



Modern Multi-Core System on Chips enable the implementation of new performance hungry applications that previously could not be realized on single core processors. Furthermore, they enable integration of many embedded applications on a single chip that have previously implemented on several devices. In addition, mixed-criticality systems, which integrate a mixture of safety and non-safety relevant applications on the same computer, aim to profit from these multi-core benefits. The main new challenges that arise for a mixed-criticality system implementation on multi-core architectures are unpredictable sources of interference between safety-relevant and non-safety-relevant applications. They originate from e.g. timing anomalies due to shared resource usage, power and thermal induced coupling due to shared power supply nets and high integration density.

Read more: HIPEAC 2016 Tutorial Training Material